Practice IB Computer Science (First Exam 2027) Topic A1.1 Computer Hardware and Operation with authentic exam-style questions for both SL and HL students. This question bank focuses on the exact syllabus content for A1.1 Computer Hardware and Operation and mirrors Paper 1, 2 style where relevant.
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A medical imaging manufacturer builds a workstation containing both a CPU and a GPU, which share the work of reconstructing a scan.
(a) how the two processors divide the work.
(b) two architectural differences between a CPU and a GPU that make this division sensible.
A processor uses a four-stage pipeline: fetch, decode, execute and write-back. Each stage takes one clock cycle.
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(c) one cost of moving work to the GPU.
A university library terminal is fitted with a processor whose cache satisfies 90 per cent of requests in 2 nanoseconds, while the remaining requests must be served by main memory in 60 nanoseconds.
(a) the average time taken to access a data item.
(b) the effect on this average if the proportion of requests satisfied by cache fell to 70 per cent.
A mobile game studio's build machine has L1, L2 and L3 cache. why a processor is fitted with several levels of cache rather than one large one.
A ferry booking kiosk executes a single machine instruction. the fetch stage of the fetch, decode and execute cycle, referring to the registers and buses involved.
