CPU Architecture
Central processing unit (CPU)
The primary component of a computer responsible for executing instructions and processing data. It performs arithmetic, logic, control, and input/output operations specified by the instructions in programs.
The central processing unit (CPU) is the brain of a computer, responsible for executing instructions and processing data. It consists of several key components, each with a specific role:
- Arithmetic Logic Unit (ALU): Performs arithmetic and logical operations.
- Control Unit (CU): Manages the execution of instructions by directing the flow of data within the CPU.
- Registers: Small, fast storage locations within the CPU, including the Memory Address Register (MAR) and Memory Data Register (MDR).
- Buses: CPU connections to primary memory and other components.
The CPU operates within the process phase of the input, process, output, and storage model, retrieving and saving data to and from primary memory.
A block diagram of the CPU illustrates the relationships between its components:
The Arithmetic Logic Unit (ALU)
Arithmetic Logic Unit (ALU)
A core digital circuit within the CPU that performs arithmetic and logical operations on binary data
The Arithmetic Logic Unit (ALU) is responsible for performing all arithmetic and logical operations. It is the computational engine of the CPU, handling tasks such as:
- Addition, subtraction, multiplication, and division
- Logical operations like AND, OR, and NOT
- Comparison operations such as greater than, less than, and equal to
When designing algorithms, consider how the ALU's operations can be optimized to reduce computational complexity.
The Control Unit (CU)
Control Unit
A key component of the CPU that manages and coordinates all operations within the computer
The Control Unit (CU) is the orchestrator of the CPU, responsible for:
- Fetching instructions from primary memory
- Decoding instructions to determine the required operations
- Executing instructions by coordinating the ALU and other components
The CU ensures that instructions are executed in the correct sequence, maintaining the flow of data within the CPU.
Registers: MAR and MDR
Registers
Registers are the fastest and smallest type of memory, built directly into the CPU.
They play a crucial role in the execution of instructions. Two important registers are:
- Memory Address Register (MAR):
- Holds the memory address of the data to be accessed.
- Communicates with primary memory via the Memory Address Bus.
- Memory Data Register (MDR):
- Holds the data to be transferred to or from memory.
- Communicates with primary memory via the Data Bus.
Don't confuse the MAR and MDR. The MAR holds addresses, while the MDR holds data.
Imagine the MAR as a pointer to a specific location in memory, while the MDR acts as a container for the data being transferred.
- The CPU can only access data from primary memory (RAM).
- Any data stored on secondary storage (e.g., hard drives) must first be loaded into RAM.
Buses
Buses
Buses are communication pathways that transfer data between CPU components and other parts of the computer.
- Each wire in a bus corresponds to a single bit, either in a memory address or in the data being transferred.
- Therefore, the width of the bus determines how much memory can be accessed.
- For example, in a 32-bit computer, the address bus must be $32$ bits wide to allow access to all $2^32$ unique memory addresses.
There are three main types of buses relevant to the CPU:
- Memory Address Bus: Carries memory addresses from the MAR to primary memory.
- Data Bus: Transfers data between the MDR and primary memory.
- Control Bus: Transmits commands from the CPU and returns status signals from other components, ensuring proper coordination and operation.
Think of the data bus as a two-way street for information, while the address bus is a one-way street directing traffic to specific locations.
The Machine Instruction Cycle
Machine instruction cycle
The fundamental process by which a computer's central processing unit (CPU) executes instructions. It consists of four main stages: fetch, decode, execute, and store.
The machine instruction cycle is sometimes referred to as the fetch-decode-execute cycle or the instruction execution cycle.
Why do we need it?
- Efficiency: The cycle enables the CPU to execute instructions quickly and efficiently.
- Scalability: The cycle is the foundation for more complex operations and multitasking.
- Universality: All modern CPUs follow this basic cycle, making it a fundamental concept in computer science.
Let's see how it works step-by-step:
1. Fetch Instruction from Primary Memory to Control Unit
- Identify the Next Instruction: The control unit (CU) determines which instruction to fetch next.
- Access the Instruction: The memory address register (MAR) holds the address of the instruction in primary memory (RAM).
- Transfer the Instruction: The instruction is sent from memory to the memory data register (MDR) via the data bus.
- Load into the Control Unit: The instruction is transferred from the MDR to the CU for processing.
The address bus is unidirectional, carrying addresses from the CPU to memory, while the data bus is bidirectional, allowing data to flow both ways.
2. Decode Instruction in Control Unit
- Interpret the Instruction: The CU decodes the instruction to understand what action is required.
- Identify Required Data: The CU determines if additional data is needed from memory.
- Fetch Additional Data: If necessary, the CU uses the address bus to retrieve data, which is then loaded into the MDR via the data bus.
Decoding involves breaking down the instruction into its components, such as the operation code (opcode)and operands.
3. Execute Instruction
- Perform the Operation: The arithmetic logic unit (ALU) executes the instruction using the data provided.
- Handle Additional Data: If more data is needed, the CU fetches it from memory.
- Compute the Result: The ALU processes the data and produces a result.
If the instruction is an addition, the ALU will add the operands and store the result in a register.
4. Store Result of Execution and Check for Next Instruction
- Store the Result: The result is placed in the MDR and sent to the specified memory address via the data bus.
- Update the Program Counter: The program counter (PC) is updated to point to the next instruction.
- Repeat the Cycle: The CPU checks for the next instruction and repeats the process.
Program counter
A special register that keeps track of the address of the next instruction to be executed.
The Fetch-Decode-Execute Cycle Animation
- Can you explain the roles of the ALU, CU, and registers within the CPU?
- How do the MAR and MDR work together to facilitate data transfer between the CPU and memory?
- Why is the machine instruction cycle essential for program execution?
- What are the four stages of the machine instruction cycle?
- How do the data bus and address bus differ in their roles?
- Why is the decode stage essential in the instruction cycle?